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Motorola 88100 CPU
Used in
BBN TC2000
Data General AViiON AV200, AV300, AV310, AV400, AV410, AV530, AV3200, AV4100, AV4300, AV4320, AV4600, AV4605, AV4625, AV5100, AV5240, AV6100, AV6240, AV6280, AV8000-8, AV8500 and AV9500
Encore 91 and 93 Series
Harris Night Hawk 4400 and 4800
MVME180 and MVME181
MVME187
MVME188
Motorola Delta Series
8220
,
8420/8440
,
8520/8540
,
8620/8640
,
8820/8840
and
8940
Motorola M8120
(MVME187-based)
Motorola Series 900 Model 810
(MVME187-based)
Omron LUNA88K and LUNA88K
2
Tadpole TP880V, TP881V, TP882V
Triton Dolphin System 100 (MVME187-based)
Details
Four functional units, fully independent with five concurrent pipelines
Up to 33MHz clock frequency
32 general purpose registers
Harvard-style bus-structure,
Separate data and instruction memory ports
30-bit data address bus
32-bit data bus
30-bit instruction address bus
32-bit instruction bus
Pipelined load/store operations
Selectable Big-Endian or Little-Endian Byte-ordering
Extensible through optional
Special Function Units
(SFUs)
L1
cache is external to the CPU and provided by the so-called
88200/88204
cache/memory management units
(CMMUs), available in different sizes
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